1. Field of the Invention
The invention relates to a chipset, and more particularly, to a chipset capable of preventing malfunction caused by feedback clock distortion and a clock generation method thereof.
2. Description of the Related Art
FIG. 1 shows a conventional clock generation unit, in which a frequency phase detector (FPD) 10 generates a control voltage according to a reference clock SCLK and a clock divided by a frequency divider 14, and a voltage-controlled oscillator (VCO) 12 generates an output clock MCLK according to the control voltage. The frequency divider 14 receives and divides a feedback clock FBCLK from an external circuit, and then outputs the divided clock to the frequency phase detector 10, such that the clock generation unit 100 can adjust the output clock MCLK according to the feedback clock FBCLK. However, when the feedback clock FBCLK is distorted by the external circuit, the clock generation unit 100 improperly adjusts the output clock MCLK, such as improperly increasing the frequency of the output clock MCLK. The improper adjustment causes malfunctions to occur in the electronic elements coupled to the output clock MCLK.